1. Field of the Invention
The present invention relates to a memory device, and more particularly to a memory device capable of detecting its failures, using a data compressor.
2. Description of the Prior Art
As generally known in the art, there are various kinds of conventional methods for testing whether or not a failure occurs in a memory device. One of the conventional testing methods includes, for example, steps of recording data in memory cell arrays by a writing operation, then reading the data stored in the memory cell arrays by a reading operation, and detecting whether or not the written data and the read data are identical.
FIG.1 illustrates a testing method for detecting whether or not a failure occurs in the conventional memory device. Hereinafter, the memory device described in the specification will be regarded as DDR SDRAM groups (DDRI, DDRII, DDRIII, . . . ,).
Referring to FIG. 1, data Din <0:15> are applied to a data input section 101 in synchronizing with an external clock clk. In this stage, if a write command becomes active, the data Din <0:15> are sent to a write driving section 102 through a global input/output line. As known in the art, in the conventional memory device of the DDR SDRAM group, the data applied to the write driving section 102 can be classified generally into two kinds of data, that is, even data gio_e<0:15> and odd data gio_o<0:15>. Data lin_e<0:15> and lin_o<0:15> output from the write driving section 102 are applied to a memory cell arrays 103 through a local data line.
Next, if a read command becomes active, the data stored in the memory cell arrays 103 are sent to an input/output sense amplifier 104 through the local data line. Data tgo_e<0:15> and tgo_o<0:15> amplified in the input/output sense amplifier 104 are applied to a data compressor 105 through the global line.
The data compressor 105 compresses 16-bit data into 4-bit data, and then again compresses the compressed 4-bit data into 1-bit data. For example, if the read data tgo_e<15>, tgo_e<14>, tgo_e<13> and tgo_e<12> are all the same as original written data, the read data are compressed into a 1-bit high level data D3. If the read data tgo_e<>15>, tgo_e<14>, tgo_e<13> and tgo_e<12> are not the same as the original written data, the read data are compressed into a 1-bit data D3 of low level. Therefore, if the compressed data D3 is at low level, this means the compressed data D3 indicate themselves as failure.
Similar to this, the data tgo_e<11>, tgo_e<10>, tgo_e<9> and tgo_e<8> are compressed into 1-bit data D2, the data tgo_e<7>, tgo_e<6>, tgo_e<5> and tgo_e<4> are compressed into 1-bit data D1, and the data tgo_e<3>, tgo_e<2>, tgo_e<l> and tgo_e<O> are also compressed into 1-bit data D0. Also like the above cases, if the data D2, D1 and D0 are at high levels, this means the failures of the data did not occur, whereas if the data D2, D1 and DO are at low levels, this means the failures thereof occurred.
Next, 4-bit data D3, D2, D1 and D0 are also compressed into 1-bit data. In this case, if the 4-bit data D3, D2, D1 and D0 are all at high levels, the corresponding compressed 1-bit data become all the high levels accordingly, whereas if at least one of the 4-bit data D3, D2, D1 and D0 is at low level, the compressed 1-bit data become low levels so that the failure of the memory can be detected.
As mentioned above, the data compressor 105 compresses the 16-bit data into the 1-bit data tgo_e<0> and tgo_o<0> to send the compressed 1-bit data to a data output section 106. Then the data stored in the data output section 106 are output to an external part of the memory deice in synchronizing with clocks generated in for example, a DDL circuit (not shown).
In the prior art, however, there are some problems as followings.
For example, if the read data tgo_e<15>, tgo_e<14>, tgo_e<13> and tgo_e<12> are not the same as the original written data, the read data should be compressed into the low level data D3. However, when all of the original written data are high level data and all of the read data are low level data, the compressed data should output the high level signals, which makes it impossible to detect the failure of the memory device. This is because there are not means for determining whether or not the original written data and the data applied by the compressor are identical.